In order to implement high-resolution analog-to-digital conversion with, for example, an effective resolution exceeding 14 bits, a multisampling ADC (Analog-to-Digital Converter) such as a ΔΣ modulator is used. A general ADC performs sampling once for one input signal. In contrast, a multisampling ADC performs sampling a plurality of times for one input signal and averages the analog-to-digital conversion results in a digital domain. Therefore, the multisampling ADC can achieve a high resolution in analog-to-digital conversion.
The number of times of sampling required for multisampling ADC, however, exponentially increases with respect to the resolution of the multisampling ADC. For example, in order to implement an effective resolution of 14 bits by singly using a ΔΣ modulator incorporating a 1-bit quantizer, it is necessary to perform sampling 1,000 times and 88 times in a primary modulator and a secondary modulator, respectively. An increase in the resolution of the multisampling ADC will lead to a decrease in the operating speed of the multisampling ADC. In addition, an incremental ΔΣ modulator as a kind of ΔΣ modulator incorporates an analog integrator such as a switched capacitor integrator. When performing high-resolution analog-to-digital conversion by using a full-scale reference voltage, since the voltage of an input signal to the analog integrator greatly fluctuates, a long period of time is required for the settling of the input signal.